How to test for Dont care bits in VHDL test bench

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hithesh123

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Let's say I am testing a 16bit number, but only interested in the lower 8 bits.
How do I ignore the higher 8 bits.'
Is there a don't care(--) operation.
ASSERT my_data = X"--00" REPORT "ERR" SEVERITY ERROR;
This didn't work. Any other work around.
 

You have to remember that '-' (dont care) is an explicit state with std_logic, so unless that bit actually is '-', it will fail.
Like shan said, look at the lower 8 bits only ( using round braces, not square ).
 

hithesh123 said:
Let's say I am testing a 16bit number, but only interested in the lower 8 bits.
How do I ignore the higher 8 bits.'
Is there a don't care(--) operation.
ASSERT my_data = X"--00" REPORT "ERR" SEVERITY ERROR;
This didn't work. Any other work around.
Click to expand...

Use the std_match function from numeric_std!

ASSERT std_match(my_data, "--------00000000") REPORT "ERR" SEVERITY ERROR;
 

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