Re: call for suggestion
To Start up with Design, you need RTL code for verification or DFT , since you cant design now. Get the free ip cores from Design reuse site or opencores.org site.
I am not sure about mentor suport .synopsys had excellent support for any design flow issues.Refere Solvnet for each basic queries before putting infront of them.
For ex DFT is your concern, Start synthesizing your modules with clock and replace with scannalbe Flops. write your own DFT specifications for the selected design. Insert dft into the design. Check the test coverage . use Tetramax. Read DFT tutorials on solvnet to get better understanding of the DFT tool.
Best of Luck.
SAM