How to solve the oscillation generated by opamp in bandgap reference circuit (PTAT).

[bhl777]

Hi all, I am designing a bandgap reference circuit. Attached is my PTAT with its opamp structure. It is a folded cascode one. However, when I simulated the circuit, the output current shows the oscillation. Could anybody advise how can I make the frequency compensation of this circuit? I do not know how to deal with this folded cascode one.

Thank you very much!

 

[FvM]

Analyze the amplifier structure and frequency response. Follow compensation principles discussed in literature: Introduce a dominant pole.

 

[dick_freebird]

I suspect the best play is to put large shunt C between
op amp output and the PMOS-pair gate node in the PTAT
section. This will help HF PSRR as well. Miller comp in the
op amp that keeps its output stable wrt Gnd, will make the
PMOS pair amplify supply noise. Of course simple shunt
comp tends to want more area than Miller comp, and this
may not fit your "design values" if it's all about individual
cell area.

Dialing down the op amp current to where it's weaker
can make you need less C. Or even natural loading. But
you run a chance of bumping up against unmodeled
device "features" like leakage floor.

 

[bhl777]

Hi dick_freebird, are you talking about put a C from the node of gate of PMOS and output of opamp, and connect the other side of cap to the GND? If so, could you tell me how much it should be around? I will let you know once I get the result. Thank you!

I suspect the best play is to put large shunt C between
op amp output and the PMOS-pair gate node in the PTAT
section. This will help HF PSRR as well. Miller comp in the
op amp that keeps its output stable wrt Gnd, will make the
PMOS pair amplify supply noise. Of course simple shunt
comp tends to want more area than Miller comp, and this
may not fit your "design values" if it's all about individual
cell area.

Dialing down the op amp current to where it's weaker
can make you need less C. Or even natural loading. But
you run a chance of bumping up against unmodeled
device "features" like leakage floor.

 

[dick_freebird]

Actually I meant to say, from op amp output (= PTAT
PMOS pair) to VDD. I can't guess a value knowing nothing
about the circuit and I'd just do a SPICE loop looking for
a decent phase margin and VDD-step response anyway.

 

[bhl777]

Hi dick_freebird, thank you for advising this. I still have a question about the bode plot test of this opamp. In cadence, should I take this opamp out and inject an AC signal to test its gain and phase margin, or I can directly inject the signal in this PTAT circuit, then probe the AC frequency response in its output?

I did simulate these two cases, and found totally different simulation result. You can see from following that if I test the frequency response in PTAT circuit, opamp's gain plot is totally wrong. My question is, is taking opamp out and testing it the right way to do? Or we should simulate its AC response in PTAT circuit, and my simulation means my circuit is wrong? Thank you!

Actually I meant to say, from op amp output (= PTAT
PMOS pair) to VDD. I can't guess a value knowing nothing
about the circuit and I'd just do a SPICE loop looking for
a decent phase margin and VDD-step response anyway.

 

[FvM]

You don't get "totally wrong" results without serious flaws in the simulation setup. Unfortunately the setup isn't clear.

 

[dick_freebird]

It's always a question, just what is the "op amp" - the
differential to single ended amplifier itself, or the two
sides of the PTAT and the output voltage? And do you
care about the op amp's stability in isolation at all, or
only the net output stability of the block?

I would be inclined to work mainly from the VDD node,
apply voltage step and look for the output node of
interest's overshoot / undershoot, samping and PSRR.
These are what matter to the function. Of course there
is a likelihood that other things are more important to,
say, a professor looking for closed form analysis or a
demonstration of a particular design methog.

 

[bhl777]

Hi FvM, could you give me more clear advise about what you are saying? The setup for simulation is no problem, I just inject an AC signal in the non-inverting input of opamp, and probe the frequency response of its output. Thank you!

You don't get "totally wrong" results without serious flaws in the simulation setup. Unfortunately the setup isn't clear.

 

[dick_freebird]

For starters, your signal of interest in an op amp
stability analysis is not the stimulus, it's the input
difference voltage. You should "sniff" that with a
vcvs and use it as your gain divisor and phase
reference. You also ought to break the loop somehow
(like a monstrous inductor and forget the information
below the corner frequency). You can use the iprobe
but I've found it occasionally untrustworthy.

 

[FvM]

Hi FvM, could you give me more clear advise about what you are saying? The setup for simulation is no problem, I just inject an AC signal in the non-inverting input of opamp, and probe the frequency response of its output.

It might be a problem if you don't care for DC bias. In the present application, you want to measure the loop gain which requires a special setup. I don't believe that the second measurement you mentioned in post #6 involves a correct loop gain setup.

In simple words, for the loop gain measurement, the loop must be closed for DC to get the correct bias point and open for AC to measure the gain. An alternative method uses a series connected voltage source and calculates the gain as the ratio of the voltages at both sides.

 

[Dominik Przyborowski]

The simplest way to check stability is to insert an analogLib→iprobe element before noninverting ota input and run "stb" analysis (works in spectre).

 

[dick_freebird]

The simplest way to check stability is to insert an analogLib→iprobe element before noninverting ota input and run "stb" analysis (works in spectre).

Yeah, when that works it works simply and well. But I
have found that every so often it will give you an upside
down or otherwise messed up result, while the Calculator
with input difference voltage and output magnitudes /
phases, never has failed me. Talking about things like
running a parametric analysis loop, seeing it work on
8 out of 9 PVT corners. Never bothered to try and figure
out why. I just went back to the way that always worked.