How to simulate the DNL and INL of a ADC?

benchen · Dec 31, 2005

An ADC based on binary weighted capacitor array needs to simulate its DNL and INL. I think the most important factor affecting the DNL and INL is the mismatch of the capacitor. Should I employ Mento carlo analysis ? And how to caculate the DNL and INL after every times of running?

wdd · Dec 31, 2005

benchen said:
An ADC based on binary weighted capacitor array needs to simulate its DNL and INL. I think the most important factor affecting the DNL and INL is the mismatch of the capacitor. Should I employ Mento carlo analysis ? And how to caculate the DNL and INL after every times of running?

maybe what you say is a current-steering DAC, for DNL and INL you can input a sinewave or a ramp, then process the data by a program based on code density testing or the transition level directly. But it'c time hungry.
Monte Carlo maybe work, more commonly, a matlab program is used with a standard deviation σ relevant to process and circuit to verify the performance.

Best

kidman561 · Jan 4, 2006

you can use the hspice matlab tools.

How to simulate the DNL and INL of a ADC?

benchen

Member level 2

wdd

Member level 3

kidman561

Newbie level 5

Similar threads

How to simulate the DNL and INL of a ADC?

benchen

Member level 2

wdd

Member level 3

kidman561

Newbie level 5

Similar threads

Privacy & Transparency

Privacy & Transparency