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How to simulate ADC in FPGA design + in-system debugging using PCIe

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May 16, 2012
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Hi all

I am having trouble with my design where I have ADC input coming to FPGA and then processing thing are done...
Then output goes through PCIe to computer.
I cannot know how can I simulate ADC signals with the FPGA...

Moreover how can I do the in-system simulation for debugging. since I do not have JTAG connection in the kit.
Is it possible to use the PCIe for chipscope


There is no "in-system simulation". Chipscope connects to real signals internally so you can monitor them. And no, it will not work with PCIe, only JTAG.

Sounds like you're going to have to put alot of front end simulation done in modelsim to make sure nothing to going to break on the real chip, as debugging your design is going to be difficult. Xilinx should provide a PCIe simulation model, and writing a model of the ADC shouldnt be too hard if you cannot find one elsewhere (at the end of the day, you're probably only interested in the data stream anyway, so that can easily be generated).

Have you at least got some spare pinouts or LEDs?
If you really want to simulate inputs within an FPGA, include a pattern generator module that generates stuff looks like an ADC. You could have a switch (or configuration setting) that changes from the external ADC to your pattern generator.

As a simple example, it could generate a sine wave from a lookup table, or an ever incrementing number.

I've done this before and it can be quite a nice debugging tool.

TrickyDicky, pardon me,what do you mean by front-end simulation
The kit provider has provided with the PCIe communication softcore, hence I
do not have to develop that from scratch. Is there no possibility to use chipscope....
When I contacted the vendor he said to attend relevant material from Xilinx...Pardon me I dont
have the idea of what exactly to do now...

and now I am not sure about the extra pinouts, but even if we have then I cannot utlize it since the ADC, PLL etc.
system board is soldered over the FPGA chip, also it is embed into the PC via PCIe...
I have been trying hard to find some solution or problem in my design but it is very difficult...
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You can't use ChipScope unless you have a separate JTAG adaptor. Your best option is to use a software simulator, or buy a JTAG adaptor, as long as the board has a JTAG header. You could also design your own ChipScope-like monitoring system that works over PCIe, though this wouldn't necessarily be a trivial exercise.

By extra pinouts, TrickyDicky means spare I/O connections. Unless you tell us which board you're using, we can't give more specific information on other possible solutions.

Hi Jeolby,

Thank you for response.
I am using 3rd party DSP board (I dont want to mention name on an open forum).
Any ways. It has two an FPGA part and other ADC+PLL+clocking part.

So in the FPGA part, they have given virtex 6 for putting custom design by the user,
where as the virtex 5 acts as bridge between PCIe and our custom design, hence my
all concern related to our code or design is on virtex-6.

It has JTAG connections, but I dont know why they left it unsoldered without any jumper etc. through which we can
connect. I guess the only way they assume the customer to debug is through PCIe , as I told earlier when I asked about their debugging method and that I did not used Chipscope for PCIe earlier they replied me the following...

Chipscope is chipscope, PCIe or not. You might want to attend a chipscope workshop, or check relevant litterature from Xilinx

So it leads me vague if it can used with PCIe or not, any ways...
now I found XAPP1002 titled as "Using ChipScope Pro to Debug Endpoint Block
Plus Wrapper, Endpoint, and Endpoint PIPE
Designs for PCI Express
" and will loon into it if something can happen...
But in the mean time please share your experiences

Thanks and Bests,

XAPP1002 gives information on how to debug PCIe designs.. you'll still need JTAG. The only way you can get ChipScope Pro to work over PCIe is if the board vendor supplies a plugin for Xilinx ISE that adds this functionality. From your correspondence with them, it seems unlikely that they've done this. Also, I've never heard of anyone designing such a plugin and the only third party vendor I'm aware of who have access to Xilinx's undocumented plugin API is Digilent, who use it to support JTAG over their own USB interface.

If there's a JTAG header but it just doesn't have a connector soldered in, you can just solder a connector in. Typically the manufacturer won't add the header if they provide some other way to program the board and they want to save money by not needing an additional soldering step for non-SMT components.

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