How to sim the mismatch of the res and cap?

[ken_cn]

Dear All,

Could you please tell me how to get the mismatch of res or caps by simulation?
I am designing a DAC which is composed of res string and cap array, and I can calculate the mismatching of the element according to the formula in the foundry documentation. But I want to run a simulation to verify the calculation result. How to do?

Thanks.

B.R.
Ken

 

[banvetor]

Ken,

To simulate mismatch in all devices of the circuit I normally use the DCmatch analysis of HSpice. I've been designing a D/A myself and this analysis has helped me very much to evaluate the mismatch in my circuit.

In HSpice, the mismatch is defined in a block in the netlist called "variation block". In this block you can define the mismatch model for all transistor parameters that you like, and also for resistor and capacitor elements.

Here's an example of this block, directly from the HSpice manual:

.variation
.global_variation
nmos MODN vth0=0.07 u0=10 %
pmos MODP vth0=0.08 u0=8 %
.end_global_variation
.local_variation
nmos MODN vth0='9.5e-9/sqrt(get_E(W)*get_E(L)*get_E(M))'
+ u0='0.7e-6/sqrt(get_E(W)*get_E(L)*get_E(M))' %
pmos MODP vth0='14.5e-9/sqrt(get_E(W)*get_E(L)*get_E(M))'
+ u0='1.0e-6/sqrt(get_E(W)*get_E(L)*get_E(M))' %
.element_variation
R r=10 %
.end_element_variation
.end_local_variation
.end_variation

Hope this helps you,
Leo.

 

[ken_cn]

Leo,
Thanks a lot for your reply.
But your method looks like that I should define the mismatch by myself. What I want is that after choosing a size of the resistor or a cap, how to get the mismatch value of them by simulation.

B.R.
Ken

 

[mastericke]

hi,
Mismatch is a result of both layout and manufacture in foundry, it's quite different according to different layout methods and foundries. So, i think it's good to investigate the total device mismatch of a foundry and to do most of the job to optimize the layout.

Masteric

 

[banvetor]

Ken,

As Masteric said, you cannot get the total device mismatch from simulations. The mismatch must be defined by the foundry, normally in the Process Parameters document or Mismatch parameters.

With these foundry supplied parameters, you fill in the variation block that I talked about before and then you can get the variation in any voltage or current in your circuit due to the mismatch in the devices.

Leo.