joshuaguo
Newbie level 2
I suffered from the port sizing for cpw with thick substrate in HFSS recently.
Substrate: Rorges RT/duroid 6010
Relative Permittivity: ε=10.2
Dielectric Loss Tangent: 0.0023
Thickness: h = 0.635mm
CPW size: calculated by ADS Tool, LineCalc
W=0.1mm (width of center trace)
G=0.082685mm(width of gap)
t=0.03mm (thickness of gold)
Considering the HFSS guidelines for CPW port sizing, the width of port was set to be 3*(W+2*G), and the heigth should be more than 4*h. However, another restriction emphasizes that both width and heigth must not exceed half of wavelength, λ/2.
I tried both port sizes and got bad results.
Substrate: Rorges RT/duroid 6010
Relative Permittivity: ε=10.2
Dielectric Loss Tangent: 0.0023
Thickness: h = 0.635mm
CPW size: calculated by ADS Tool, LineCalc
W=0.1mm (width of center trace)
G=0.082685mm(width of gap)
t=0.03mm (thickness of gold)
Considering the HFSS guidelines for CPW port sizing, the width of port was set to be 3*(W+2*G), and the heigth should be more than 4*h. However, another restriction emphasizes that both width and heigth must not exceed half of wavelength, λ/2.
I tried both port sizes and got bad results.
