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The overhang of diffusion is basically process and foundry dependent (Minimum value).
If we put just one contact then the overhang would be
spacing of contact from gate poly+contact width+diffusion enclouser of contact
For 0.18u in the fab we use minimum overhang is .16+.22+.1=.48micron
For 0.25u in the fab we use minimum overhang is .22+.3+.12=.64micron
For ease of things I usually take 1 micron overhang.
To get an first approximation you can use AD=AS=2.5*Lmin*W. With Lmin the minimum L allowed by the technology. This is geted from the Ken Martion book, Digital Integrated Circuit Design.
PD=PS=5*Lmin + W for a non shared transistor. For a shared transistor the PD or PS can be lower, PS=5*Lmin, since the sidewalls from the active channel do not count.
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