I plan to running a simulation using verilog written testbench in Modelsim. I would like to save specific signal(s) into a file(any format). What is the syntax? Pls provide with some example.
I plan to running a simulation using verilog written testbench in Modelsim. I would like to save specific signal(s) into a file(any format). What is the syntax? Pls provide with some example.