How to remove spikes in Digital VLSI design?

[isaacnewton]

how to remove spikes

Hello Everyone,

This question is about Digital VLSI design. The attached Figure is the post-layout simulation of 4-bit ALU. From the figure, you can see there are lots of SPIKES (circled parts). Does anybody has seggestions about how to remove or alleviate those spikes?

Thank you in advance.

 

[borodenkov]

How to remove spikes?

spikes are ok.. this is a general behavior of a combinantional circuit with unequal propagation delay in different paths.

The solution for this is synchronous circuit approach - you sample the output at clock edge. Read any basic digital electronic book about it.

 

[radiohead]

Re: How to remove spikes?

If these spikes cannot be tolerated: put a small capacitive load at the output. It prevents fast voltage changes. But be aware that the rise and fall times will become larger also!

 

[electronrancher]

How to remove spikes?

first thigs first - this is the ANALOG forum!!

next - you can easily see that due to your risetimes and falltimes, there are portions that don't overlap perfectly. AND these together and you have a glitch. does this sound like your problem?

clock your circuit, and make sure there are no glitches at a clock edge - you will be fine. else back to the drawing board, and go ask the digital forum.

 

[moorhuhn]

Re: How to remove spikes?

Usual method is to store the outputs to the output register. The glitches can not propagate through the register stage. To be a little bit "analog" you may also decide to use dynamic logic instead of the static one you are using now ;-).

 

[huanchou]

Re: How to remove spikes?

This is the digital timing issue. Try to measure the width of spike weather it can be ignored or not. If it is serious in other corners, try to check your standard cell timing and to fix the sizing to modify the strength of digital feedback loop.

 

[cmosbjt]

How to remove spikes?

use a delay circuit to blank the spike if you just want to ignore it