AdvaRes
Advanced Member level 4
Hi members,
The output of the VCO go to a buffer and then to the frequency divider. The buffer is non other than a chain of two inverters. When I simulate the PLL 60% of the noise come from this buffer.
How to resolve this problem ?
Thanks in advance for your replies.
Cheers,
Advares.
The output of the VCO go to a buffer and then to the frequency divider. The buffer is non other than a chain of two inverters. When I simulate the PLL 60% of the noise come from this buffer.
How to resolve this problem ?
Thanks in advance for your replies.
Cheers,
Advares.