saulbit
Member level 4
Dear everyone,
I am dealing with an active loop filter PLL. The output designed is 4050MHz~7050MHz per 25MHz step. The synthesic IC is HMC700 from Hittite Microwave, and the Kv for VCO is 2pi*130MHz typically, while the op in the fiter is OP376, with +/- power supplies.
The PLL can be locked easily. However, I found the spectrum of the phase noise of the output is like"^|^". In other words, there is a noise hump @ about several ten Kilohertz offset, and the height of the hump is about 15dB.
How can I reduce of eliminate the phase noise hump? Or did anyone met such problem in your active loop filter PLL before? Then how you overcame it? Thanks in advance.
I am dealing with an active loop filter PLL. The output designed is 4050MHz~7050MHz per 25MHz step. The synthesic IC is HMC700 from Hittite Microwave, and the Kv for VCO is 2pi*130MHz typically, while the op in the fiter is OP376, with +/- power supplies.
The PLL can be locked easily. However, I found the spectrum of the phase noise of the output is like"^|^". In other words, there is a noise hump @ about several ten Kilohertz offset, and the height of the hump is about 15dB.
How can I reduce of eliminate the phase noise hump? Or did anyone met such problem in your active loop filter PLL before? Then how you overcame it? Thanks in advance.