Re: How to print enumerated signal to file in VHDL testbench
you can assign values to everything :
for example :
dbg_p : process (clk)
begin
if rising_edge(clk) then
new_arb_sm_dff <= new_arb_sm;
case new_arb_sm_dff is
when IDLE => pkt_arb_state_dbg <= "000";
when NPI_REQ => pkt_arb_state_dbg <= "001";
when GNT_ASI_0 => pkt_arb_state_dbg <= "010";
when GNT_ASI_1 => pkt_arb_state_dbg <= "011";
when GNT_IP => pkt_arb_state_dbg <= "100";
end case;
end if;
end process dbg_p;