hi. i'm simulating a dram in hspice and there is the read bit line that needs to be precharged before wordline read affects. the problem is i don't know how to precharge bitline .i saw some people use .ic for precharging sram bitlines and i tried that on dram but the voltage comes and goes after one nano seconds. i saw some papers that simulated this kind of dram in cadence using a pmos connected by gate to a precharge pulse and its source and drain connected to vdd and bitline.is it necessary in hspice too? why just not use a pulse?