how to power supply for high speed analog circuit?

[xuexucheng]

Hi, nice guys.
1. As a rule of thumb, the power supply(LDO) should be as close as possible to the circuit. However, since the limitation of PCB area, I must move the power supply to the other PCB and connect the 2 PCBs using very long cables(>2m). I know that we can place lots of decoupling capacitors to keep the power quality. But I want to know is that how to analyze this situation in a quantitative way. i.e. how to caculate?

2. As we know the switch power supply is much noise. If I use this power supply for analog, the noise will be high. Thus, can the LDO be usefull to reduce the noise? How much the noise can reduced? i.e. how to caculate? Is there any other way to reduce the power supply noise effectively?

Thanks in advance.

 

[enjunear]

1) Long stretches of wire will look like inductors. A rule of thumb is 20 nH/inch. So 2m would give you ~1.6 uH of inductance. You can use that as a lumped element inductor in your circuit analysis and get a reasonable approximation. Besides decoupling caps (which block high frequency signals... so does large series inductance), you should add some bulk storage caps to your board with the high speed analog circuit load.

If the analog circuit suddenly draws a large current, the voltage on that board will droop because of the inductive effect of the 2+ meter wires. By putting some "local energy storage" caps on the HS analog board, those circuits can quickly draw current from the bulk storage caps, which will slowly be replenished when the power supply catches up (due to lag induced by the wires' inductance).

2) In order to reduce noise, you need to filter the signal. An LDO will reduce low frequency effects like slow-moving AC transients (ripple), but it won't do much to high frequency switching noise induced by the SMPS. For that you just need some good old LC low-pass filters. The LDO spec sheet should give you some idea of how much high frequency rejection it will provide. Transient simulations of your SMPS circuit will tell you what kind of frequency content and signal amplitudes to expect coming out of the power supply.

Signals out of power supply (dBm) - attenuation of LDO (dB) - desired level for noise signals (dBm) = required attenuation of filter (dB)

single frequency example: +10 dBm - 7 dB - (-60 dBm) = at least 63 dB of attenuation

 

[xuexucheng]

Thank you very much. Your answer is excellent.
add some bulk storage caps
------- then How many caps should be added? How about the capacitance of the capacitors? Also how to caculate?
You know the inductor and the capacitor will cause resonance. Thus how to avoid the resonance? Also how to caculate?
For that you just need some good old LC low-pass filters.
-------- If I use the DC-DC module, dose the module contain the LC low-pass filters? Do I still need the LC low-pass filters?
How to choose the inductance of the inductor? Also how to caculate?
Thank you again and best wishes!

1) Long stretches of wire will look like inductors. A rule of thumb is 20 nH/inch. So 2m would give you ~1.6 uH of inductance. You can use that as a lumped element inductor in your circuit analysis and get a reasonable approximation. Besides decoupling caps (which block high frequency signals... so does large series inductance), you should add some bulk storage caps to your board with the high speed analog circuit load.

If the analog circuit suddenly draws a large current, the voltage on that board will droop because of the inductive effect of the 2+ meter wires. By putting some "local energy storage" caps on the HS analog board, those circuits can quickly draw current from the bulk storage caps, which will slowly be replenished when the power supply catches up (due to lag induced by the wires' inductance).

2) In order to reduce noise, you need to filter the signal. An LDO will reduce low frequency effects like slow-moving AC transients (ripple), but it won't do much to high frequency switching noise induced by the SMPS. For that you just need some good old LC low-pass filters. The LDO spec sheet should give you some idea of how much high frequency rejection it will provide. Transient simulations of your SMPS circuit will tell you what kind of frequency content and signal amplitudes to expect coming out of the power supply.

Signals out of power supply (dBm) - attenuation of LDO (dB) - desired level for noise signals (dBm) = required attenuation of filter (dB)

single frequency example: +10 dBm - 7 dB - (-60 dBm) = at least 63 dB of attenuation