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Hi, it is actually quite simple. Let's say you want to create a 4-bit wide, 8 location ROM. (Let's store just the address of the location + a constant 8 )
Here is the code in VHDL.
library IEEE;
use ieee.std_logic.all;
entity ROM is
port(
ADR in : std_logic_vector (2 downto 0); --ROM Address (0 ---7)
DATA out : std_logic_vector(3 downto 0) --Data stored in ROM
);
end ROM;
architecture Store of ROM is
begin
process(ADR) --Sensitivity list
begin
case ADR is
when "000" => DATA<="1000"; --If address 0 return 8
when "001" => DATA <="1001"; --If addres 1 return 9
when "010" => DATA <= "1010"; --If addres 2, return 10
when "011" => DATA <="1011"; --If addres 3, return 11
when "100" => DATA <="1100; --If address 4, return 12
when "101" => DATA <="1101"; --If address 5, return 13
when "110" => DATA <="1110; --If address 6, return 14
when others => DATA <="1111"; --Any other addres (7), return 15
end case;
end process;
end Store;
This is the way you can create a ROM in the FPGA. To retrieve the contents of it, you simply put the desired address on the input.
Until and unless you have a flash non-volatile storage inside the FPGA, you can not store anything in it permanently. At power on, the FPGA gets configured from the external memory (e.g.PROM), as soon as the power is switched off, nothing, not even your ROM, remains inside.
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