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# How to multiply 2 signed Fixed-Point numbers ?

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#### omara007

Hi guys

I have two 16-bit bit vectors .. each one represents a signed binary number. The format of each vector is as follows:

XXXX . XXXXXXXXXXXX

Where the (dot) represents the binary point that separates the integer part from the fraction part.

The Most Significant Bit order is (15), while the Least Significant Bit order is (0).

As the vector is signed, bits (12, 13, 14) represent the integer value while bit (15) is the sign bit. The numbers are represented in 2's complement format.

Now, I want to multiply these 2 vectors. I know that the result will be placed in a 32-bit vector. Yet, where will be the position of the binary point ? .. Please notice that it's a signed multiplication process.

The fraction part is 12+12=24 bit long. Doesn't matter either it signed or not.

Yes, so you have to drop 12 fractional bits and use saturation logic for the integer part.

FvM said:
Yes, so you have to drop 12 fractional bits and use saturation logic for the integer part.

Didn't understand what you said exactly .. please elaborate more ..

You were told in plain english: the product fraction size will be 24 bit. That is (4.12) x (4.12) = (8.24).

Drop (or cut) 12 fractional bits is self-explanatory, I think. If you have doubts about needing saturation logic, you may want
to play around with numeric examples and consider, how you intend to handle a numeric overflow.

GeorgeM said:
You were told in plain english: the product fraction size will be 24 bit. That is (4.12) x (4.12) = (8.24).

Thanks GeorgeM .. Yet, I don't think my last comment was intended for you .. did you notice that I quoted FvM ?

FvM said:
Drop (or cut) 12 fractional bits is self-explanatory, I think. If you have doubts about needing saturation logic, you may want
to play around with numeric examples and consider, how you intend to handle a numeric overflow.

Yes FvM .. it's about Saturation Logic .. did you assume I won't use a 32bit register for the output ?

Hi,,

you can use
"a 2's complement parallel array multiplier by bough & wooley"

paper..

regards

Chin

chin said:
Hi,,

you can use
"a 2's complement parallel array multiplier by bough & wooley"

paper..

regards

Chin