Re: Mismatch analysis
Hi Keith,
Yeah, i want to find the offset due to mismatch in each pair of transistor and i was pretty much able to do that for all the other pair but for M3/M4. ( I also took M3/M5 as a pair)
But, i would again request you to please clarify on my question about the current in M3 and M4 branches when there is a offset voltage applied at the source of M3.
(which was: Random offset measurement:
1. I guess we agreed on the fact that with the offset voltage at the source of M3, the quiescent current in M1/M3 will not be I/2. but, i believe for offset analysis we must have the inputs of M1/M2 at Vcm and that would mean, the current in M1/M2 would be same and which should be I/2. But, now that the source voltage of M3 is no same as that of M4, the current in them will be different. Rather one of them will have I/2 and other will have I/2 3$/pm 3$/Delta. and this extra current in (say M3) would circulate locally (ie. M3 -> vn -> M3 ) and generate extra voltage at the gate of M3 which will get mirrored and appear at the output.
2. It above situation doesn't happen and the current in M1/M2 also changes form I/2 then how is it happening when the Vgs of both M1/M2 are same.
)
Also, how would you suggest me to go about measuring the systematic offset? As i believe, the path from positive input to output is different from that of negative to output.
thanks
-Divya