You din't show the original suggestion, but it sounds far off from reasonable digital or mixed design methods. However, if the chip vendor means to suggest it, he should clearly tell where to place the said coil, otherwise it's just a kind of twaddle.
For decoupling of digital supply pins, there are some profound standard methods: Placing low inductance chip capacitors directly at the supply pins, if necessary, adding ferrite beads. Parasitic inductances are everywehere, even the pin to chip bond wire inductance will be in a several nH order of magnitude. An artificial 0.4 nH inductance is "less than nothing" in this relation.