how to increase frequency response of CMOS comparator?

[kumarghz]

cmos frequency response

Dear genius,
Can someone suggest how to increase the frequency response of this CMOS comparator? current response is about 10MHz only for Gain vs Freg product. FYI TSMC 0.18um technology has been used for this project.thanks.



Added after 3 minutes:


hi guys,
here is the comparator circuit for your reference. thanks.

 

[fredflinstone]

frequency responce for cmos comparator

Why you are using the above circuit as a comparator rather than using normal preamplifier followed by latch type of architecture, which will be faster than a two stage amplifier used as comparator. You can make the preamplifiers as simple differential amplifier with resistive load. This will have higher bandwidth than the amplifiers with PMOS load. Also the gain of the preamplifier stage should be such that the input reffered offset of the latch is within 1/2 lsb of ur system. This normally comes to around 40~50dB

rgds
fred

 

[acbalbason]

hi!

try adding a compensating capacitor. Ü

- al

 

[fredflinstone]

sorry i am not able to understand how adding a compensation cap helps... my understanding is since these amplifiers are used in open loop configuration stability will not an issue ... Also it will reduce the bandwidth isn't? please correct me if i am wrong
rgds
fred

 

[gte582w]

kumarghz: if you have a copy of Baker's book,
read the comparator chapter and it will help you.

 

[xusoso]

to use multi-stage

 

[n1cm0c]

Search for comparator in this forum, there have been several posts on this subject.

fred's advice is the good one. Don't try to use two high-gain stages to make a high-speed comparator, use two pre-amplifier stages to obtain a gain of about
200, then one final high-gain stage. It's best to use a regenerative amplifier (latch) as the last stage, but if your application requires continuous time operation (no clock signal for comparison) then you could use a something like in Jacob Baker's book (also in Razavi's data converter book, I think), a stage with some positive feedback to get more gain without increased delay.