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How to improve the VCO build by Colpitts parallel resonance?

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Jan 29, 2002
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why my vco is so poor?

I use traditional Colpitts parallel resonance circuits to build a 2.14GHz vco(spec is 90dBc/Hz@10k,110dBc/Hz@100k,140MHz range) but the phase noise is very poor(83dBc/Hz@10k 104dBc/Hz@100k and tuning range is only 140MHz)however i tuned. here is my sch.How can I improve my phase noise( at least 90dBc/Hz@10k 110dBc/Hz@100k tuning range is at least 140MHz)I've try a lot and never get success......

two suggestions

One major factor is the Q of the tuned circuit. The resistors across the tank (the ones used to bias the BJT) will lower the Q. Try higher value resistors. Even better, use a low noise FET which will not draw gate current and you can have even larger value resistors. If you ise a depletion mode FET, you can rely on the transmission line to ground the gate and the source resistor to make the bias. You will not need any gate resistors. You can also use two power supplies, one for the B+ and the other for source bias.

Secondly, the losses in your inductor strip may be high. Try temporairly using a real coaxial cable for this transmission line. The semirigid type will work better than the ones with woven wire outer conductors.

Thank you very much! In the attachment sch, there are 3 resistors in my circuit.The two bias the base (i use bjt)is 3.5k ohm and 10k ohm.The other is 560 ohm connecting the emitter and the ground.Are they too small?

you have forgotten too add a choke stub to the power rail my pal
you also need a choke stub on the audio rail vc control rail
these are crytical componets
dont rely on just capacitors or resistors to decouple the supply


and i think this circuit will self oscillate unless you use ceramic pcb {copper clad ceramic materials...etch as usual} and also
change the association of the low value caps

the secret with shf is too keep the cap values too as high as possible on the gnd {earthy} side of the circuit as a whole

so 100pf or 47 pf is better than 1.8pf for stability
or you need too add a compound too fix the hysterisis

the secret with these effects is good grounding

you must have a thru every 20th of a wavelenth or beter resolution

for any goundplane you must place a thru every 8 th of a wavelenth or better
you must also enclose the whole oscillator in an rf cage {much like high freq xtal} too improve the stablilty
also using hatched groundplane for big patches of gnd breaks down the coupling capacitances of the pcb its self
reducing coupling between parts of the circuit that shouldnt couple so tight

so hatching stuff like any area bigger than the square of 1% of a wavelengh... or similar cross association worked out by the cap per cm square of the pcb of substraight you use is best

for a clean job and tight responce
add a filter too the supply locking the volts too 3.3 or 5.7 or something
your of oscilator regulation isnt there???????

for a vco??? lol:)

also you need too use silver solder not lead tin and also a good quality high silver content keeping its aplication very tight {more like a weld but very neet very little solder is needed so wet any contact first the solder as is dont reaply more.....
clean very well with a good solvent only once to remove flux {very important}
then leave to dry before you power

should be better than surface mount grade for any prototype i would use 62lead 10tin 26.3{silver} 1.3{bismith} 2.4 gold
or buy a very high grade bar of smd solder {or steel from work if you have access}

realy circuits here are hyper crytical
even one drop of moisture is bad so best too pack your unit with silica bags

too absorbe any vapors

mount the caps as close as possible too the transistor legs and keep these as short a possile {even measure these to the non resonant lenght so it wont cause sparadic oscilations too start}

use a good quality lengh of cable as a dummy load

coiled up with a load at the end 47R not 50R

this way you get a more balanced tune {esp if several stages are planed}

you need very much to plan for hysterisis
this is very very tender an osc at this freq
so mechanical stablity is a must

use another stage of amplification before trying to read this osc you design

or my pal your intruments will colapse the field and it will ping ping ping your pll however decoupled a probe

the capacitance and amount of rf you will achives with no choke stub will maybe poor and the transistor will thermal runaway from the reactance of the low value cap and gnd varience.... thru self oscillations

one further question

all these oscilator designs tap power from the emiter { this is daft }

better to couple the signal from the collector via a small 3.3R load res and a 10 pf cap
very little coupled and amplify lots on the next stage
= a very stable oscilator
the key is stablility not componet count

dont be sparse with stages often an oscilator design just dosnt cut it with out a little clout say >50 mw is best from any vco
and a pure sine at the freq
even as far as a two stage tuned carbon tube filter to purify it
esp if ddc is planed to derive freq shift ..... etc

esp if fm is planed also

that's good.
I've just see the circuit again and find a parasite occillate in 280Mhz(occillate is in about 2.2G)
why does this happen?I also find that if i increase the c1 and c1 the parasite occillate tend to low
both in frequency and level,but it still exist,how can i get rid of it? :(


Try making C3 larger. It is intended as a coupling capacitor to keep the inductor from shorting out the bias. Now it is the same size as the frequency detrmining elements.

Part of the low frequency oscillation problem is the higher gain of BJTs at low frequencies compared to high frequencies. Try reducing the gain a little with a small resistor in series with the emitter before it connects to the tuned circuit. 26 mV/Ie in ma will halve the low frequency gain.

Hi there,

I think a BJT is the best choice for noise for this frequency.
I have 2 remarks :
1. do not underestimate the noise of the supply of the VCC but especially from the tuning voltage.... eventually countercheck with a standalone battery. Usually it needs some extra coils/caps to decrease the noise of LDO's. Of course use a LDO that is ONLY for the osc. part.

2. to take decoupling caps high is a nice statement but unless you use SHF chipcaps unrealisable due to the low SRF's of the chipcaps. I would use C7 not to exceed about 5pF and to put immediately close to the collector.

Further of course the Q of the varicap or series reistance also plays a role and the number of MHz/volt... but this is obvious. Eventually take out the varicap and measure with a fixed cap. just for seeing the difference.

Regards and good luck. 8)


These are my suggestions

Your usage of the inductor in this case is better treated as an inductor, so you have an LC tank. When you build the LC tank, optimize the LC such that the characteristic impedance is small. This should help improve the Q. Make sure you use low loss substates, and very low ESR caps around the tank section.

R3 should be an inductor. Your tuning gain may be large large, any resistor noise will be translated to signifcant phase noise. use an inductor such that its resonance is centered at your mid frequency of interest.

If you can sacrifice more current, make sure your transistor is baised a little hotter. I know more current means more noise (not always true thought, there is an optimum), but you may be surprise that with a larger gm (larger Ic) your signal-to-noise improvement will out-do your current noise increase.

Use smaller resistors on R1 and R2, they lower the noise at the Base. You give up more current through them. Make sure your Vce is biased large.

To enable larger Vce, your R5 has to decrease, now put an inductor in series with R5 to ground, so at RF, your emitter is open.

Very important: DON'T USE THICK FILM RESISTORS, their noise voltages are 20 dB or so higher then metal film ones.

Hope all goes well for you. Now its up to you to sit in your lab and tweak it till it works.


a fet has far superiour gain at these freq so at low gain levels and drive make pretty stable designs for a vco
although a bjt device is good a dual gate mesfet is by far the best choice

using a fetlington device {multi fet array} as a second stage and band pass filter too give a very nice stable design that wont be microphonic becouse a transistor is not a field device so suffers from shock or movement drift etc......

as you will see you can poke at the schematics there all day
and the simulator will still show parasites on the carries sub harmonics so listen at these freq it is VERY hard too get a pure sine from any device and carefull calculation too the 1000th of a mm is required we all know this
bjt device is too slow too respond too change /{the guy wants the modulate this section a few kc and too use the phase componet too input audio

look fm is phase modulation unless you modulate the vco via a veractor diode it is only ever phase modulation becouse ....
in doing it with a veractor diode you get the latency effect of the diode rounds the sine the transistor switching the audio in make
so adding the freq componet correctly too the carrier

if you just add voltage diferentiation too the vco control chanel this is phase fj3 not f3e {fm freq modulation} transition mode
i saw some nice coaxial pcb capacitors are avalible on a site
{very handy at these freq ratios}

no - wonder you get phase noise if you phase modulate a vco .....LOL}
your using phase modulated componet for vco shift
this will realy increase phase noise as the resistors creack and groan and the caps get squeezed
so i think use a veractor a dual version 3pin is best then you can modulate and shift simultanius on REAL fm as you move vco the audio and phase wont change ???ever wonder how a tv can tune with no breakup by shifting the voltage
with a design so sparse of a good filter the vco will also drift so....

be sure to add some chokes

only too finish by adding

listen man there are teams of designers build vco block universal fm {real} modulatable silicon chip single oscilator 50mw output {when heatsink is used}
these are used as exciter for a 5w module in most mobile phone designs
so are also popular

my advise {strong }
is too pic the audio freq on a separate oscilator running at a 10th the freq of this one and too phase lock one loop the the others then to a referance this will give very clean oscilations real fm prob better than a 1G bandwidth and full control most are also programable and some have ram for sequencial scanning

use these chips save your time
your open a can of worms in a deisgn for vco that does as it should

why not use one

Several suggestions from topology point of view:

I would suggest a cascode output rather than emitter coupling, the loading would not contribute to your design tradeoff too much.

One way to reject supply noise is to use differential VCO,
check out this paper:
A 37~ 50 GHz InP HBT VCO IC for
OC-768 Fiber Optic Communication

Finally, if you want to check the influence of VCC or Vtune in optimizatio and simulation, I would recommend Hajimiri's ISF method (impulse sensitivity function), refer to his book "the design of low noise oscillators".
But make sure, the phase response fully settles.

why my vco is so poor?

Could you please reilei reupload the shematics.

Re: why my vco is so poor?

I can't see your schematic so that i can't help you. Could you post againt your schematic in acttachment?

why my vco is so poor?

The Extension 'bmp' was deactivated by an board admin, therefore this Attachment is not displayed.

can you paste another?

why my vco is so poor?

I'm afraid that reilei is gone. He hasn't posted any messages to EDAboard in nearly five years.

why my vco is so poor?

oh,the topic is posted in 2003,

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