how to implement verilog code on FPGA

Status
Not open for further replies.

bhavani403

Newbie level 1
Joined
Aug 6, 2012
Messages
1
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,286
we have developed an DES algorithm in verilog.Now i have to implement in FPGA board.Now i have to build a module assigning a switch(north) to the input values that connects to the top module(main module).Please help us with some code.I am new to FPGA
 

Status
Not open for further replies.
Cookies are required to use this site. You must accept them to continue using the site. Learn more…