How to implement delay using basic digital blocks?

[bhl777]

Hi all, I am trying to build a block that can have a 50ns delay between input and output. This is for some further logic circuit.
I am using some basic digital logic, and I know inverter can achieve this function. However, in my simulation library, each inverter only has around 50ps delay.
That means if I want to achieve 50ns delay, the number of inverter I need is around 1000!

I am just wondering if there is any other simpler way to implement delay circuit via these basic digital logic circuits? Thank you very much!

 

[chuckey]

So you want a pulse of duration T, delayed by 50 nS? The way I am thinking is to have two paths, one the pulse, one the inverted pulse. Use each path to trigger a timer of 50 nS, use the output of these two timers to fire a SR bistable. This might make the SR bistable set 50 nS after the pulse's leading edge, then reset 50 nS after the pulses trailing edge. A bit untidy, lets see what others can offer.
Frank