xilinx pll
Hi,
Many of the FPGA families are comming with with PLLs or DCM (Digital clock managers). Example stratix-II, Vertix-II have them. You need to write a wrapper around these to make it cmatible with your PLL. However they offer limited functionality as compaired with analog PLLs in ASIC. DCMs doesnt give options to change the multiplier & divider in RUN time. You need to fix them during synthesis.
I dont think that if you have any analog pll module, that you will be able to put in FPGA as it is.
Hope this will help you.
Best luck,
Ram