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How to get multi-thread CPU simulation for Cadence and Synopsys tools

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bulihawkeye

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To accelerate design, I used following commands for multiple CPU processing command in Cadence Encounter APR tcl file:

" setMultiCpuUsage -acquireLicense 8 -localCpu max"

It seems working fine.

For Cadence Virtuoso Calibre DRC/LVS, may I use similar tricks to make it run faster? It's pretty slow for a large design.

Also, is there a way to run Synopsys DC shell for synthesis faster by activating multiple CPU?

Thank you.
 

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