how to get Capacitance Vs Voltage graph in Cadence

Status
Not open for further replies.
V

venkateshjuturu

Junior Member level 3
Joined
Oct 31, 2013
Messages
29
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Location
vellore
Activity points
153
hai,
i am designing VCO in cadence-virtuoso ADE L(180nm) topology is attached below where i have to know how to plot graph C Vs Voltage. Capacitance is parallel combination of two PMOS varactors (PM2 and PM3) and also when i simulated the ckt with 1.2V i am getting low peak to peak voltage swing how to increase the output voltage peak to peak swing
can any one help me in this regard

thanks in advance
 

Attachments

  • Untitled.png
    16.1 KB · Views: 42

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…