How to generate a square wave in a analog PLL simulation with verilog-AMS?

[ruwan2]

Hi,

There is a PLL verilog-AMS model. Now it works in the simulation with sine input signal, i.e. the output sine phase tracking input signal source phase. I would like to see what output will be for a square wave input. I know that a large magnitude sine wave passing a limiter will be a square wave. Yes, I can code it with several line code. Are there other ways for the requirement? I would like to know some easier ways may be out there.


Thanks,