What are you goning to explain?nicolepsn said:to the first question:
under some special conditions,such as low temperature,the FSM will not turn to the scheduled state you make,for example:you want the state change from 000 to 011 under some condition,but the last two bits can't chage in the same time,then 000 will change to 010 ,and the state will stay for a time,which will make a error!any one is welcome if she or he disagree my idea!
ifarmer said:To nicolepsn:
Do u have any experiences like you said. Wonder the low temperature can prevent two bits change simultaneously in the PGA logic internal.
Regards
Ifarmer
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