How to find area of my design?

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Collang2

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When I write
dc>report_area
my design is 500.

But I don't know exactly how big that is. how many mm^2 the design actually is?

I found out through my technology file that the size of the 2 Input NAND gate of this library is 1.

But I don't know the " NAND size! ", how many mm^2 the gate actually is?

And can't I check the size of the macrocell in DC?
 

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How the gate count of a design is determined?
 

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As I understand it the number of gate equivalent is a term used to define/compare how a big design is.
The silicon area consumed by a design is something else. The silicon area will depend on the target technology.
 

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are you using an academic library? this notion of an area of "1" is strange. in real commercial libraries, all area values are given in the LEF file
 

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