Jun 5, 2015 #1 D d0nathan Newbie level 3 Joined May 6, 2015 Messages 4 Helped 0 Reputation 0 Reaction score 0 Trophy points 1 Activity points 34 I implemented ring oscillators on an Altera Cyclone IV with Quartus II. The compilation choses arbitrarily which inputs of the LUTs are used. I could edit each LUT seperatly but this is very time-consuming. Is there a way to determine which LUT inputs are used without changing each one severally? Attachments LE LUT.jpg 28.7 KB · Views: 89
I implemented ring oscillators on an Altera Cyclone IV with Quartus II. The compilation choses arbitrarily which inputs of the LUTs are used. I could edit each LUT seperatly but this is very time-consuming. Is there a way to determine which LUT inputs are used without changing each one severally?
Jun 5, 2015 #2 T TrickyDicky Advanced Member level 7 Joined Jun 7, 2010 Messages 7,110 Helped 2,081 Reputation 4,181 Reaction score 2,048 Trophy points 1,393 Activity points 39,769 Unfortunately, the only way to do this is but hand editing each lut. The tools are not really meant for this kind of logic.
Unfortunately, the only way to do this is but hand editing each lut. The tools are not really meant for this kind of logic.
Jun 5, 2015 #3 ads-ee Super Moderator Staff member Joined Sep 10, 2013 Messages 7,944 Helped 1,822 Reputation 3,654 Reaction score 1,808 Trophy points 1,393 Location USA Activity points 60,207 Instantiate the LUTs using library primitives. I don't recall either Xilinx or Altera swapping pins when you instantiate a LUT.
Instantiate the LUTs using library primitives. I don't recall either Xilinx or Altera swapping pins when you instantiate a LUT.
Jun 5, 2015 #4 FvM Super Moderator Staff member Joined Jan 22, 2008 Messages 52,409 Helped 14,749 Reputation 29,780 Reaction score 14,095 Trophy points 1,393 Location Bochum, Germany Activity points 298,049 When using cyclonexx_lcell_comb, the inputs may be reassigned by the fitter. As far as I understand, this done due to routing constraints, the routing options aren't orthogonal.
When using cyclonexx_lcell_comb, the inputs may be reassigned by the fitter. As far as I understand, this done due to routing constraints, the routing options aren't orthogonal.