How to extract Netlist in Synopsys Synthesizer?

[firozjdang]

I have performed simulation in VCSMX and Synthesized the code using Synopsys DC, What are the commands required form here on to generate the netlist (Toshiba Library)?

 

[jbeniston]

To write out a netlist in DC, just do:

write -format verilog -hierarchy -output netlist.v design

 

[firozjdang]

Thank you so much....