How to extract Netlist in Synopsys Synthesizer?

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firozjdang

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I have performed simulation in VCSMX and Synthesized the code using Synopsys DC, What are the commands required form here on to generate the netlist (Toshiba Library)?
 

To write out a netlist in DC, just do:

write -format verilog -hierarchy -output netlist.v design
 

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    firozjdang

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