delta136
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I'm having some trouble thinking of an algorithm for extending a 4-bit left shifter to 32-bits
Here's my 4 bit left shifter code:
I know I need to use a generate block, otherwise I'm going to be manually connecting 160 muxes. I'm having a lot of trouble figuring out the algorithm for the for-loop of the generate block though... any help or pointers would be greatly appreciated. This one has stumped me for a while now.
I know that zero needs to be plugged into each cascade of muxes, according to the index of 's'.
For example, the first cascade for s[0] = 2 ^ 0 = 1. Therefore there is one 0 coming into the mux.
The 5th cascade for s[4] = 2 ^ 4 = 16. Therefore there are sixteen 0's coming into the mux.
I also have to do a 32-bit right barrel shifter, so any help on that would be greatly appreciated as well!
Normally I would draw it out and figure out the algorithm, but I just can't picture 160 muxes :bang:
Here's my 4 bit left shifter code:
Code:
module left_barrel_shift_4(output [3:0] y,
input [3:0] b,
input [1:0] s);
wire mux1_out, mux2_out, mux3_out, mux4_out;
mux_2x1 mux1(.y_out(mux1_out), .l0(b[0]), .l1(1'b0), .select(s[0]));
mux_2x1 mux2(.y_out(mux2_out), .l0(b[1]), .l1(b[0]), .select(s[0]));
mux_2x1 mux3(.y_out(mux3_out), .l0(b[1]), .l1(b[1]), .select(s[0]));
mux_2x1 mux4(.y_out(mux4_out), .l0(b[1]), .l1(b[2]), .select(s[0]));
mux_2x1 mux5(.y_out(y[0]), .l0(mux1_out), .l1(1'b0), .select(s[1]));
mux_2x1 mux6(.y_out(y[1]), .l0(mux2_out), .l1(1'b0), .select(s[1]));
mux_2x1 mux7(.y_out(y[2]), .l0(mux3_out), .l1(mux1_out), .select(s[1]));
mux_2x1 mux8(.y_out(y[3]), .l0(mux4_out), .l1(mux2_out), .select(s[1]));
endmodule
I know I need to use a generate block, otherwise I'm going to be manually connecting 160 muxes. I'm having a lot of trouble figuring out the algorithm for the for-loop of the generate block though... any help or pointers would be greatly appreciated. This one has stumped me for a while now.
I know that zero needs to be plugged into each cascade of muxes, according to the index of 's'.
For example, the first cascade for s[0] = 2 ^ 0 = 1. Therefore there is one 0 coming into the mux.
The 5th cascade for s[4] = 2 ^ 4 = 16. Therefore there are sixteen 0's coming into the mux.
I also have to do a 32-bit right barrel shifter, so any help on that would be greatly appreciated as well!
Normally I would draw it out and figure out the algorithm, but I just can't picture 160 muxes :bang: