How to evaluate the chip's Qor of the P&R

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xjtuding

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Not for pad limited , just for core limited design.
Is it the placement density is the only rule to evaluate, in case of sillicon has been approved working ?
 

There are different metrics..
* Performance
* Power (leakage and dynamic)
* Area
* Run time of the implementation.
 

what is the order of preference
is it
Area,
Performance,
Leakage
and run time

__sree
 

It is PPARM

p -> Power
p -> Performance
A -> Area
R -> Run time
M -> Memory

Thanks
 

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