Ripple on the tuning line goes directly to jitter /phase noise.
You would like to filter this as hard as you can, without
violating any frequency-slewing or loop stability requirements.
An up/down PLL often has filtering in the external op amp; a
"charge pump" PLL could just have a capacitor, which you
might append anoher RC network to.
Now, at lock, your charge pump ought to be largely silent.
Unless you have some bleed current removing charge
and requiring the pump to restore it. This is something
you might look into - why is the Vtune line moving up and
down when it should be at rest? Anything that minimizes CP
activity will reduce phase noise.
Also it might not be too far-out, to see 3% worth of ground
bounce in any old branch of a digital circuit. Your reference
point for measurement should be the VCO ref ground.
Check other ground-points, like the PLL's, for how tight
they are to the destination. Return key filter grounds
separately to the VCO ground-point, etc.