[SOLVED] How to edit a .v file that has been outputted by Core Generator?

[kenleigh]

I used Core Generator to prepare a clock resource to generate a specific frequency. It generated a PLL_Base primitive and few BUFG's.
However I get at error when synthesizing and it says that I need to add on ODDR2 component at the output of the BUFG.
For this I need to edit the .v file generated by Core Generator. However in the Design panel I can see only 2 files

1 .xco file (generated by core generator)
2. .v file (my top level verilog module)

I can view the .v file of the Core Generator by right clicking the .xco and clicking View Function HDL model. However I cannot edit it. Any ideas how to do it?

 

[permute]

notepad. vim. anything that isn't ISE.

or just make sure the OBUF's for the clock aren't in the .v file already, and place the ODDR outside the module. that way you can regenerated the core if there are any updates and not have to re-modify it.