Hi,
can u please tell me how to draw sample and hold circuit in cadence using two stage opamps.....and can u please tell me if i give input voltage 1.8v the how the output voltage in sample and hold circuit..Can u send me the circuit of sample and hold circuit using two stage opamps...
thanks,
sauj
this sounds very much like a homework problem. sample and hold is simply a switch cap circuit that samples the input voltage when the switch is closed and holds the voltage when the switch is open, think analog equiv to a latch.
to help drive the cap and to help the cap drive the next stage amps can be used as buffers. --[>--/ --Cap circuit--[>---