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Are you asking how to choose I/O pins when designing your PC board hardware, or how to specify pin numbers in your ISE project?
If ISE, then you have various ways of specifying pins depending on your chosen work flow. Try starting with section "Assigning Pin Location Constraints" in your "ISE Quick Start Tutorial", qst.pdf. Also see "LOC" in your ISE "Constraints Guide", cgd.pdf.
If you are using Xilinx Project Navigator Synthesis tool ,use assign package pin option given under user constraint title.
Same technique use with respect to other tool.
But don't forget that u should also be having given FPGA specification manual.
There are two ways to do this.
1. Text based pin constrains specified in UCF (User Constraints file)
you can refer to xilinx docs about the format
2. Use PACE utility (Pinout and Area Constraints Editor) in the Xilinx ISE .WHich simplifies the pin assignment using its GUI and takes care of generating ucf.
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