You can use the report
report "End of file " & ControlFile_g & " Pseudo random Transactions" severity Note;
But you can also use the textio
Example (from old code)
use Work.Image_pkg.all; // Useful package
// see
https://web.archive.org/web/20070204123448/members.aol.com/vhdlcohen/vhdl/Models.html
file LogFile_f : text open write_mode is "uartsim.log"; -- simulation log file
file ErrFile_f : text open write_mode is "uarterr.log"; -- error log file
variable L_v : Line;
Write(L_v, Image(now) & "Uart_client detected error in XMT Err bit. ");
Write(L_v, "Observed PIR = " & Image(ServerData.Data(5 downto 0)) &
"Resetting XMT side");
Lfault_v := new String'(L_v.all); -- make copy
Writeline(output, L_v); -- write to output
Writeline(ErrFile_f, Lfault_v);
--------------------------------------------------------------------------
Ben Cohen (831) 345-1759
https://www.systemverilog.us/ ben@systemverilog.us
* SystemVerilog Assertions Handbook, 2nd Edition, 2010 ISBN 878-0-9705394-8-7
* A Pragmatic Approach to VMM Adoption 2006 ISBN 0-9705394-9-5
* Using PSL/SUGAR for Formal and Dynamic Verification 2nd Edition, 2004, ISBN 0-9705394-6-0
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn 0-9705394-2-8
* Component Design by Example, 2001 ISBN 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 ISBN 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition ISBN 0-7923-8115
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