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How to display MDA in Virsim?

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yuenkit

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virsim

hi,

I know how to use DVE to display MDA.
I am just wondering how to do that in Virsim.

I am using vcs 2005.06

I manage to display in Virsim, but I dont think this is the proper way.
first, I include $vcdplusmemon in verilog.
the i run "vcs -RI mem_test.v""
when Virsim open, I open Hierarchy and Logic window.
I drag the design to Logic window. The MDA variable still havent shown yet.
Then i run 1 time step. and I click on th input of the MDA block in logic window.
But the Hierachy window shows 2 MDA variable, which have the same name.

This is the way i discovered. If you know the correct way, please let me know. Thanks.
 

aji_vlsi

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yuenkit said:
hi,

I know how to use DVE to display MDA.
I am just wondering how to do that in Virsim.

I wonder why you would go back to VirSim? DVE crashed or some thing?

I am using vcs 2005.06

That could be a bad DVE, use recent version(s) - DVE has improved quite a bit since 2005.06.

Sorry couldn't help much in VirSim, personally I'm a happy DVE user, wouldn't go back to VirSim.

Regards
Ajeetha
www.noveldv.com
 

yuenkit

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yes, i agree with you. DVE is much better than virsim :)

I love it's look and feel. and much more powerful. :) I asked the question regarding virsim is because a lot of ppl in my country are still using virsim.

However, I will recommend them to use DVE :)
 

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