how to detect a pulse from a fast clock domain to a slow one

[sweesw]

I know how to use a 2 DFF edge detector to detect pulse from a slow clock domain to a fast one. Can anyone tell me another version of the edge detector that can do the fast-to-slow?

I thought I would stretch the pulse for 5-10 cycles if the clock frequecy between the two are 5-10 times different. But someone says this is not necessary and this guy gives me a simple answer that can detect the signal from 200MHz domain to a 1K domain, unfortunately I dont understand his design. Does anyone know the decent answer to the problem?

 

[akp494]

Re: how to detect a pulse from a fast clock domain to a slow

Use a Toggle synchronizer

 

[xigu]

handshake

 

[hover]

asynchronous FIFO

 

[wadaye]

Re: how to detect a pulse from a fast clock domain to a slow

Hi sweesw:

The answer first depend on the clks, are they asynchonous? It decides

the synchronization stragety we take.

wang1

 

[sweesw]

Re: how to detect a pulse from a fast clock domain to a slow

Of course the two clocks are asynchronous and it is a single bit signal that does not need a FIFO to handoff.

 

[AlexWan]

Re: how to detect a pulse from a fast clock domain to a slow

the two clock are from different PLL?

are there some relations between the fast clk and the slow clk?

 

[wadaye]

Re: how to detect a pulse from a fast clock domain to a slow

the two clock are from different PLL?

are there some relations between the fast clk and the slow clk?

sweesw already said, the clock is asychoronous, so them can't from the

same pll.

 

[supercst]

I think the only way is handshake, and it need another signals for request&ackowledge.

 

[rakko]

Re: how to detect a pulse from a fast clock domain to a slow

supercst is right. use a flop synchronizer to register the pulse in its native clock domain, then pass it to a double register in the slow clock domain and use the pulse recipt acknowledge from slow domain to reset the sending flop in the fast clock domain.

 

[akp494]

Re: how to detect a pulse from a fast clock domain to a slow

Toggle synchronizer

 

[Fom]

Re: how to detect a pulse from a fast clock domain to a slow

I think 2 DFF is best solution. Why you don't want to use that? If we will know reason may be we can find for you exactly what you want.

 

[farmerwang]

Re: how to detect a pulse from a fast clock domain to a slow

Check this out.

 

[wadaye]

Re: how to detect a pulse from a fast clock domain to a slow

I think 2 DFF is best solution. Why you don't want to use that? If we will know reason may be we can find for you exactly what you want.

The 2 DFFs can only resolve the metastability. It's not enough to this

issue. You also need handshake.

wang1

 

[hawk]

Re: how to detect a pulse from a fast clock domain to a slow

TFF works perfectly. done & checked.

 

[siawklai]

Re: how to detect a pulse from a fast clock domain to a slow

For fast to slow synchronization, you need to assert control signal (R) for a period of time that exceeds the cycle time of the sampling clock..