Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

How to design many power turn on sequence

Status
Not open for further replies.

ccljpeg

Junior Member level 3
Joined
Dec 8, 2001
Messages
26
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
138
Hi, everybody:

My project : LCD TFT driver design

There are three power : VDD (+3.3v) , VDDH( +23V) , VEE (-10V)

If IC power on, the first VDD is slowly on stable ( after 2ms), and then
VEE power on after VDD is stable(after 5ms), and then VDDH power on after VEE is stable (after 5ms)

Help me,I hope someone can tell me how to design, thank you in advanced
 

You have three choices. The first is to design the circuitry powered by these sources so that the sequence is not necessary. This is the best option.

The second option is "open loop" in that you have 555 timers or such things to apply the power from these supplies to the loads after a long enough time interval that they are surely up to the proper values.

The third option is to have comparators in each supply that turns on the next one after the first one has come up to full value.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top