How to design a low voltage current source?

Status
Not open for further replies.
W

walker5678

Full Member level 3
Joined
May 17, 2006
Messages
179
Helped
7
Reputation
14
Reaction score
3
Trophy points
1,298
Activity points
2,493
I am designing a low voltage current source, which need to work under 1.8V supply voltage, use standard 0.5um CMOS process.
Does the structure below satisfy the requirement? Can it work to generate a PTAT, and if it works, how to bias the amp ?
Appreciate your advice. Thanks.
Best regards,

 

Yes, the structure you show will generate a low voltage PTAT current. As for the Opamp, you can bias it from a separate const. gm core ( since it is the simplest to implement )
 

Hi elbadry
I konw that in the rail to rail input stage, there is constant gm structure, but how to use it to bias an amp? could you please describe it in more detail?

Thanks a lot.
 

How about the effect of the offset of the OPAMP ?
 

fanrong said:
How about the effect of the offset of the OPAMP ?
Click to expand...

The offset affect the current very much. If no offset,

bias current = Delta(VBE)/R = VT*ln/R,

With offset,

bias current = (VT*ln+VOS)/R

if choose n=8, VOS ~ +/-5mV and VT=25mV in room temp,

bias current ~ (50+/-5)mV/R, which means 10% chip-to-chip variation.
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…