How to design a fast up-down counter (7-bit)?

[Aymen++]

Re: fast counter

can anybody tell me how to design very fast up-down counter?

Added after 8 minutes:

7-bit only

 

[eda_wiz]

fast counter

how fast? whats is the reqd frequency?

 

[anjali]

Re: fast counter

your counter speed depends on the max comb delay in the longest path & technology too.

 

[Aymen++]

Re: fast counter

this counter must keep up with 521 MHz...
is it possible?

 

[eda_wiz]

fast counter

7 bit add/sub @ 521mhz..shud be possible with 90nm or 130nm..

 

[Aymen++]

Re: fast counter

7 bit add/sub @ 521mhz..shud be possible with 90nm or 130nm..

What do u mean?

 

[eda_wiz]

fast counter

I meant to say it shud be possible to synthesis a 7 bt updown counter @ 521 Mhz.. if you use .13u or smaller process. havent tried by myself though

 

[xysafety]

Re: fast counter

I agree with whizkid
Very high fequency chip, It is easy to design with method of analog.
The synthesis method is very difficult when your design is very huge.

 

[kermit]

Re: fast counter

I found out that it is very diffcult to implement a programmable counter(bit 2), that is the divider can be 1,2,3,4 , and output clock duty cycle is 50% at 0.09nm process for 960MHz.Because I must use both the posedge and negedge. The slack is about -30ps.