How to design a bypass capacitor?

[jovin555]

how to design bypass capacitor?Normally we use 0.1uF for bypassing (VCC to GND)in digital IC,s.Is there any calculation for this?

 

[Borber]

Theoretically no standard calculation formula exist that I know. You may take in consideration ripple in current consumption and it's HF part of digital circuit at different points of supply chain and output impedance of supply source at this points and calculate suitable capacitor to minimize so generated ripple voltage to acceptable value at the same points. Usually proper number of 0.1uF capacitors at those points solve the problem.

 

[chuckey]

A bypass capacitor must have a reactance which is low at the working frequency. Its not only its value but the series inductance of its construction and of the PCB track layout that will degrade its performance. On a lot of digital designs there will be a decoupling cap on every IC, so as to minimise the series inductance. If you are building audio mixer desks , you may use 470 MF capacitors on every board, horse for courses...
Frank

 

[goldsmith]

how to design bypass capacitor?Normally we use 0.1uF for bypassing (VCC to GND)in digital IC,s.Is there any calculation for this?

Hi jovin555
Bypass of what ? PSU line ?
It depends on the distance between the circuit which is supposed to be supplied by your PSU and your PSU . and it's frequency of operation .
so what kind of circuit you're about to supply ?

Theoretically no standard calculation formula exist that I know

Hi Borber
Who told this ? of course there are some standard rules to design those filters in PSU line . sometimes it can be selected randomly . i agree with this but when the application is special there are some well known rules which can be applied .

A bypass capacitor must have a reactance which is low at the working frequency

Hi Frank
Right to the point ! but sometimes it can be destructive ! again it depends on where we're going to use it and for what kind of circuit .


Best Wishes
Goldsmith

 

[jovin555]

Am using max999 in my circuit.So its used to produce a 1ns pulse for lasing action.but the final laser pulse has noise with it.So i like to know some methods to reduce noise in my circuit.

 

[goldsmith]

Am using max999 in my circuit.So its used to produce a 1ns pulse for lasing action.but the final laser pulse has noise with it.So i like to know some methods to reduce noise in my circuit.

In order to reduce noises through the power line there are several ways . one of them is a differential filter which can easily eliminate many of the unwanted noises .
every line on PCB or wires are dealing with an equivalent circuit which is a pretty high order filter which can be simplified with an RLC filter that can be cause of many of the noises and also if a wire is high length it can be like an aerial of noise receiver .

Best Wishes
Goldsmith

 

[jovin555]

So what should be the value of decoupling capacitor for frequency range 500Mhz to 5 Ghz for logic IC's like D-flipflop?Should we use 0.1uF and 0.01uF in parallel for high frequency?and if its used,should we keep 0.01uF close to IC and then 0.1uF?

 

[chuckey]

Its the series inductance of the capacitor+leads+track that are important. i.e. a 100PF SMD device will be better then a .01MF with 2 Cm long leads/track length.
Frank