How to design a buck-converter from this paper?

[shaq]

ramp voltage level in buck converter

Dear all,

I want to design a buck-converter.
The specification is Vg=2.5v, Vo=1.5v.
But, I don't know how to choose the voltage level of the ramp signal, the clock frequency, i2, A(s) and Vref.

I have read the paper but still cannot design this specification I just said.
Please give me a lot of comments.
Thanks.

 

[edwintsu]

Hi shaq,

Output swing range of the error amp set the voltage level of ramp signal.

MAX. current ripple decide your clcok frequency. ΔIL=VOUT(1-D)/(f•L)

i2 is current load. Max. i2 is relative with the MOS size of power stage.

Vref is set to 0.6, 0.8, 1.2 et al typically.

loop compensation --> A(s) (refer to the attachment,pp.7-18)

Wish it can help u.

Edwin.