alexz
Full Member level 5
Is there a way to define a one bit from an std_logic_vector?
something like that:
myport : inout std_logic_vector(15 downto 0);
define mybit myport(0) ;
now I would use "mybit" instead of myport(0) .
Also, what is the way to do that with literal numbers?
define aaa 15
or
define bbb '1'
something like that:
myport : inout std_logic_vector(15 downto 0);
define mybit myport(0) ;
now I would use "mybit" instead of myport(0) .
Also, what is the way to do that with literal numbers?
define aaa 15
or
define bbb '1'