Here a lot of papers.
See file 200410CICC_Vrefdesign.pdf. Usually ratio is 1:8, but especially for low voltage design frequently 1:24, 1:48 and ever 1:80 is used (array 3*3,5*5,...). Large ratio gives u an oportunity to make PTAT less sensitive to resistor mismatches and to offset of error amplifier (EA).
Do DC sweep over temperature&supply ranges, AC analisys (stability of EA), TRAN, in additition(check stability), PSSR (XF analisys in spectre), MONTECARLO and NOISE is in awards. Take into account the load capacitance as much as expected.