How to decide area for a leteral BJT for bandgap reference

[rajblr]

hi everyone,
i am designing a BGR of a sub-1-v range and i am struck at choosing the area for BJT. I am using parasitic BJT and i am sure how to define the area for BJT's. Can any one provide me some information or some materila on this. Also can any one give me how to simulate the BGR completely.

TIA
raags

 

[srieda]

Re: How to decide area for a leteral BJT for bandgap referen

Assuming you are using TSMC, use pnp10 as beta is high for this...

 

[rajblr]

Re: How to decide area for a leteral BJT for bandgap referen

hi sreida ,
My question is how to size the BJT for bandgap reference design. If u have any material it will be of great use for me.

TIA
raags

 

[DenisMark]

Here a lot of papers.

See file 200410CICC_Vrefdesign.pdf. Usually ratio is 1:8, but especially for low voltage design frequently 1:24, 1:48 and ever 1:80 is used (array 3*3,5*5,...). Large ratio gives u an oportunity to make PTAT less sensitive to resistor mismatches and to offset of error amplifier (EA).
Do DC sweep over temperature&supply ranges, AC analisys (stability of EA), TRAN, in additition(check stability), PSSR (XF analisys in spectre), MONTECARLO and NOISE is in awards. Take into account the load capacitance as much as expected.

 

[scottieman]

Re: How to decide area for a leteral BJT for bandgap referen

First, sorry I am not helping on this topic. I do have a question on bandgap fabricated on CMOS technology. Why we always work with a BJT but not simply a P+ to n-well diode that can be obtained from PMOS device? Any reason behind? Please let me know if you guys know it

Thanks