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how to deal with the internal tri-bus in dft design

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chico

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how to deal with the internal tri-bus in dft design, thank you
 

xworld2008

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I think dft tools can't deal with internal tri-bus, change code and use MUX to deal with it.
 

chico

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how to change the code
 

anjali

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in general, bidirectional buses will be at chip level. within the chip all will be unidirectional buses. so no question of internal tri-bus.

chip level bidir buses will be considered as ip/op based on scan configuration.
 

chico

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but in my design,the tri-bus is bidirectional, what should I do now
 

dr_dft

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There are several ways to deal with tristate buses.
The problems to solve are to make sure that there are no contentions on the tristate bus, and the bus does not float.
The bus floating problem can be solved by adding bus keepers.
The bus contention problem needs careful analysis of the tristate drivers on the bus. If there is full decode on the enables of these drivers (only one driver is on at a time), then there should be no problem, although ATPG tools may have a hard time to recognize that it is fully decoded. If there are flip-flops in the decoding logic, and these flip-flops are scanned, then there is a potential of partial decoding, which can lead to bus contention. In the most extreme case, the enable line of each tristate buffer may be driven by a scan flip-flop. This will cause a major contention problem during scan.
The safest way to solve this problem is to disable all trisate drivers during scan (by ANDing each tristate enable with a testmode signal), then add a bus keeper on the tristate bus.
Hope this helps.
 

chico

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Thank you very much, its very helpful to me, thank you!
 

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